Mehdi Trabelsi Ajili

Multimodal Deep Learning Hardware

PhD Research at Tokyo Institute of Technology, Tokyo, Japan, 2017 - 2022

Acceleration of multimodal neural networks on heterogeonous CPU/FPGA platforms using Xilinx Zynq Ultrascale+. Tackling the challenges of combining multiple sensors with different data types into a multi-architechture neural network (combination of CNN and RNN). The goal of this project is to design a low-power, low-latency embedded device to achieve classification or prediction of time-series sensor data.

Tools and technologies: Caffe, Tensorflow, Keras, Tensorflow Lite, LeFlow/LegUp, Xilinx Vitis AI, HLS4ML, Xilinx Vitis, Xilinx Vivado, Xilinx HLS, VHDL/Verilog, Petalinux, Yocto, Raspberry Pi, Python, C++, Docker, Anaconda, Jupyter, VScode, Coral Edge TPU, Zynq Ultrascale+

Modular embedded/server test framework

Development project at Continental GmbH, Schwalbach, Germany, 2017 (5 months)

Development of a test framework allowing to connect embedded modular test units to global servers. The goal is to have configurable embedded modules dedicated for various test functions then automate, manage and synchronize the test data from multiple locations of the company around the globe.

Tools and Technologies: Embedded Linux, Kernel compiling, Device drivers, C, Python, HDF5, Bus protocols (CAN, LIN, FlexRay), Communication protocols (Ethernet, TCP, UDP, RPC), Databases, Servers and Virtual Machines.

System design for a testing framework

Development project at iSYS GmbH, Munich, Germany, 2016-2017

Complete system design (Hardware/Software/Mechanical) for test automation of industrial ventilation systems. Requirements analysis and building of the test device and its software and drivers. Upgrade the of the company proprietary testing framework, GUI design, packaging, and documentation of the software. Management and planification of test cases automation.

Tools and Technologies: Python, wxPython (GUI), windows batch scripting, innoSetup, PCB design, mechanical packaging design, hardware mounting.

Car Trunk software test manager

Development project at iSYS RTS GmbH, Germany, 2016-2017

Managing test scenarios, reporting bugs, planing and implementing automated scripts to test the BMW car trunk software/firmware.

Tools and Technologies: proprietary eclipse-based scripting language, Python, Windows batch, JIRA.

test framework development for Apple Carplay

Development project at iSYS RTS GmbH, Munich, Germany, 2015-2016

Development of a test automation framework to evaluate the Apple CarPlay software integration in the BMW infotainment system. Design of several software and hardware mechanisms for testing the analog and digital interfaces, as well as the software features and functionalities. Design of the framework GUI. Management and implementation of automated test scenarios.

Tools and Technologies: python, wxPython(GUI), Windows Batch, iOS, Android ADB, analog/digital sensors, Communication Buses (CAN, LIN, Ethernet), Image processing, Speech recognition and sound processing, JIRA.

Digital Design of a high frequency data transmitter on FPGA

Internship project at Wavesense Gbr, Munich, Germany, 2015 (4 months)

Design and implementation of a hardware module using VHDL on FPGA to load and send data through a high frequency analog transmitter. The design is controlled by an Arduino to program a flash memory then load digital data to the FPGA. The FPGA synchronizes and transmits the data to a Digital-to-Analog converter for transmission.

Tools and Technologies: Xilinx Spartan-6, Digital IC design, VHDL, FSM, Arduino, C, QSPI flash memory, Embedded communication protocols (SPI)

Implementation of BMW Airtouch gesture control sensor

Part-time project at Motius GmbH, Munich, Germany, 2014 (3 months)

Implementation and evaluation of a motion sensor prototype to control the car HUD using hand motion. Focus on signal processing and basic gesture detection.

Tools and Technologies: Motion sensor, Embedded communication protocols (I2C, SPI), Arduino, C, Matlab, signal processing and filtering.

Evaluation of the real-time performance of the linux kvm hypervisor

Research project at the Institute of Robotics and Embedded Systems (TUM), Munich, Germany, 2014 (3 months)

Evaluation of the reactivity of the KVM hypervisor for real-time tasks. A linux with PREEMT-RT patch hosts multiple virtual machines through KVM where an intensive task uses a windows domain while a time sensitive task executes on a RT-Linux domain. Experiments are run on the RT-Linux virtual machine to determine the latency and prioritization of KVM.

Tools and Technologies: Hardware-assisted Virtualization, KVM, RT-Linux, Kernel Hacking, Real-time Benchmarking tools.

Improvement of the real-time motion of an earthquake simulator

Master Thesis research project at the Fukushima Robotics Lab, Tokyo Insistute of Technology, Tokyo, Japan, 2013-2014 (6 months)

Analysis and evaluation of a mechanical personal earthquake simulator. A platform floating thanks to air pressure is connected through wires to 4 motors controlled by a PC. The software, hardware and communication mechanism of the system were investigated to achieve a real-time behaviour. The operating system was updated to an RTOS wih strict deadlines, the software was optimized to meet the timing constraints and the CAN communication between the motors was upgraded to EtherCAT to achieve a better synchronization between the motors with very low latency.

Tools and Technologies: Earthquake simulators, Robotics, Kinematics, Fieldbus (CANopen, EtherCAT), DC Motor control and Encoders, IMU sensors, PCB Design, RTOS for x86 (Xenomai), C/C++ software design, Timing Analysis, Code optimization for real-time applications, GUI design (Visual Studio and MFC), Kernel and device drivers, Virtualization.

DESIGN OF A COMMUNICATION MECHANISM BETWEEN ARM CPU AND FPGA

Research project at the Institute for Cognitive Systems (TUM), Munich, Germany 2013 (3 months)

As part of a humanoid design, this project consists of developing part of the hardware and software for a chip controlling the robot's leg. The developed design is a generic mechanism to communicate software data to hardware components. An RTOS communicates information to a shared bus which stores information on the FPGA on-chip memory. A memory controller written in VHDL manages the data between the on-chip memory and the FPGA Input/Output signals.

Tools and Technologies: Digital IC design, FreeRTOS, C, VHDL, AXI, Xilinx ISE, Zedboard

Improving the Xen Hypervisor to support real-time tasks

Bachelor Thesis research project at the Institute for Real-Time Computer Systems (TUM), Munich, Germany 2011 (5 months)

Cars use multiple electronic control units (ECUs) with isolated softwares or operating systems. With the evolution of hardware virtualization, this project investigates the concept of running real-time tasks inside multiple operating systems on a single ECU. The scheduler of the Xen Hypervisor was analyzed and improved to run multiple isolated domains and prioritize the real-time tasks. A set of experiments where network packages are exchanged between domains and an external PC while one real-time domain executes low-latency tasks showed that it is possible to reach the response time required by the automotive standards.

Tools and Technologies: C++, Open-source, OS kernel editing and compiling, Xen Hypervisor, Paravirtualization, Linux Bash, Timing Analysis, Network protocols

Developing a C++ Parser to convert transister models

Development project at the Institute for Electronic Design Automation (TUM), Munich, Germany 2011 (3 months)

Analog CMOS transistors have different modelisation to be used in simulation or hardware design. Current Source Model (CSM) use faster mathematical representation than usual Verilog-A models representations. The goal of this project is to develop a parser using C++ and Yacc&Lex to convert the Verilog-A transistor models to a C code that can be integrated in the lab's simulation program to easily calculate the CSM parameters.

Tools and Technologies: C++, object-oriented programming, Lexical Analysis, Parser, SPICE simulation, Linux GNU Tools

Machine Learning Tokyo

Member since 2019

MLT (Machine Learning Tokyo) is the biggest Machine Learning Community in Tokyo. It connects professionals and students through study sessions, workshops, talks and hackathons. I participated in different workshops and talks to exchange knowledge with many students and engineers around Tokyo.

Tokyo Code Crunch

Member between 2019 and 2020

Tokyo Code Crunch was a group organizing hackathon and workshops to introduce coding, web design and machine learning to the public to all ages and all levels. I participated as an active member to present workshops, classes and mentor new learners.

Tunesische Akademiker Gesellschaft e.V.

Active member between 2008 - 2015

Tunesische Akademiker Gesellschaft e.V. (TAG) is an academics association based in Munich, Germany. Members are students and professionals from various fields and targets mainly the tunisian community. It supports students with their studies and organizes different events (cultural, sports, professional, educational...). I was active member helping with the organization of different events and took the role of IT manager between 2011 and 2013 to lead the team responsible of web design and technical workshops.

Maritime RobotX Challenge Team

Team member between 2013 and 2014

WaZa-TokyoTech was a team from the Fukushima Robotics lab in Tokyo Institute of Technology. We participated in the Maritime RobotX Challenge competition to develop an autonomous boat. My role concerned the design and maintenance of the website of the team.